Document Type

Conference Proceeding


Computer Science (HMC)

Publication Date



A model for parallel computation called a schema is presented. This model is similar to that presented in the recent work of Karp and Miller. Section 1 presents a description of the model, and some results on the characterization of computations within it. Section 2 summarizes some results on determinacy and equivalence. Section 3 presents a formalization of the property of maximal parallelism in schemata. Several alternate characterizations are shown to be equivalent for certain classes. Section 4 presents results on the complexity of a maximally parallel schema equivalent to a given schema.


Published conference presentation.

Previously linked to as:,343

The article can also be found at

Rights Information

© 1970 Institute of Electrical and Electronics Engineers (IEEE). Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.

Terms of Use & License Information

Terms of Use for work posted in Scholarship@Claremont.