On Maximally Parallel Schemata
Computer Science (HMC)
A model for parallel computation called a schema is presented. This model is similar to that presented in the recent work of Karp and Miller2. Section 1 presents a description of the model, and some results on the characterization of computations within it. Section 2 summarizes some results on determinacy and equivalence. Section 3 presents a formalization of the property of maximal parallelism in schemata. Several alternate characterizations are shown to be equivalent for certain classes. Section 4 presents results on the complexity of a maximally parallel schema equivalent to a given schema.
© 1970 Institute of Electrical and Electronics Engineers
Keller, Robert M., "On maximally parallel schemata," Switching and Automata Theory, 1970., IEEE Conference Record of 11th Annual Symposium on , vol., no., pp.32,50, 28-30 Oct. 1970 doi: 10.1109/SWAT.1970.13